13.5.3 Astables

Astable Circuits Overview

Astables are a type of oscillating circuit that generates continuous pulses of a fixed frequency and duration. These circuits are often referred to as pulse generators because they produce clock pulses in a repeating sequence. An astable circuit has no stable states, meaning it constantly switches between "on" and "off" states with a consistent period. This property is crucial in applications requiring repetitive timing, such as clocks or signal timers.

Understanding the Period of Oscillation ($( t_p)$ :

The period $t_p$ is defined as the time taken for one complete cycle of the waveform — from the start of one pulse to the start of the next. It includes:

• On Time ($t_{on})$ - Duration when the output is in the "high" ($1$) state.
• Off Time $( t_{off} )$ - Duration when the output is in the "low" ($0$) state. The period can be calculated as:

$$t_p = t_{on} + t_{off}$$

Clock Rate (Pulse Frequency):

The clock rate (or pulse frequency) represents the number of pulses generated per second. This frequency is the reciprocal of the period:

$$\text{Clock rate} = \frac{1}{t_p}$$

Pulse Width and Duty Cycle:

• Pulse Width is the time duration that the pulse remains in its "on" state.

• Duty Cycle is a percentage measure of how long the pulse stays "on" in one cycle, calculated as:

$$\text{Duty cycle} = \frac{t_{on}}{t_p} \times 100$$

For example, if $t_{on}$ and $t_{off}$ are equal, the duty cycle would be 50%.

Mark-to-Space Ratio:

The mark-to-space ratio defines the relationship between the duration of the "on" (mark) period and the "off" (space) period:

$$\text{Mark-to-space ratio} = \frac{M}{S} = \frac{\text{Mark}}{\text{Space}}$$

If $t_{on} = t_{off}$, then this ratio is 1:1.

Astable Circuit Construction and Functioning

Astables are typically formed using an RC (Resistor-Capacitor) network connected to a NOT gate with hysteresis. This configuration allows the circuit to have two distinct switching thresholds (upper and lower), enabling the circuit to oscillate.

The operation of the circuit is as follows:

1. Initially, the capacitor is uncharged. This causes the NOT gate output to be high ($1$), and the capacitor begins to charge through the resistor.
2. When the voltage across the capacitor reaches the upper switching threshold, the NOT gate flips, causing its output to go low ($0$).
3. The capacitor then discharges through the resistor until the voltage reaches the lower switching threshold, triggering the NOT gate to flip back to high, and the cycle repeats. This oscillation creates a continuous output pulse, as shown in the voltage vs time graph.

Thresholds in the NOT Gate:

• Upper Threshold: Triggered at approximately $\frac{2}{3} V_s$.
• Lower Threshold: Triggered at around $\frac{1}{3} V_s$.

Calculating the Period and Pulse Frequency

For an RC astable circuit, the on time $( t_{on})$ is the time for the capacitor to charge from $\frac{1}{3} V_s$ to $\frac{2}{3} V_s$. The off time $( t_{off} )$ is the time for the capacitor to discharge back down to $\frac{1}{3} V_s$. Since the charging and discharging times are symmetrical:

$$t_{on} = t_{off} = :highlight[0.7 RC]$$

Thus, the period $t_p$ is given by:

$$t_p = :highlight[1.4 RC]$$

Finally, the pulse frequency is the reciprocal of the period:

$$\text{Pulse frequency} = \frac{1}{1.4 RC}$$