Von Neumann Architecture (OCR GCSE Computer Science): Revision Notes
📚 Revision Notes
Von Neumann Architecture
The Von Neumann architecture describes a computer system where both data and instructions (programmes) are stored in the same memory. This design is widely used in modern computers.
MAR and MDR
MAR (Memory Address Register)
- Stores the memory address of the data or instruction to be fetched from or sent to memory.
- Its purpose is to point to the location in memory where the CPU needs to read or write data.
MDR (Memory Data Register)
- Temporarily holds the data that has been fetched from or is about to be written to memory.
- Its purpose is to act as a buffer between the CPU and memory, storing data being transferred.
Purpose of Each Register
- MAR stores an address, telling the CPU where in memory to fetch or send data.
- MDR stores data, either coming from or going to memory.
Difference Between Storing Data and an Address
- Storing data means holding the actual information being processed (e.g., a number or a letter).
- Storing an address means holding a reference to a specific location in memory where data is stored.
Programme Counter and Accumulator
Program Counter (PC)
- Holds the address of the next instruction to be executed by the CPU.
- It automatically increments after each instruction is fetched, ensuring instructions are executed in sequence.
Accumulator (ACC)
- A special register is used to store intermediate results of arithmetic and logic operations.
- It temporarily holds data being processed by the CPU, particularly the outcome of calculations.
infoNote
Key Points to Remember
- The Von Neumann architecture stores both data and instructions in the same memory.
- The Memory Address Register (MAR) holds the location of the data or instruction in memory.
- The Memory Data Register (MDR) temporarily stores data being transferred between the CPU and memory.
- The Programme Counter (PC) tracks the address of the next instruction to be executed.
- The Accumulator (ACC) stores intermediate results of arithmetic and logic operations.