Digital signal processing (AQA A-Level Physics): Flashcards

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Sequential logic
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Sequential logic circuits vs combinational

Output depends on current AND past inputs, not just current

Binary counter definition

Circuit that counts pulses in binary, controlled by clock signal

CK input in binary counter

Clock Input - where clock pulses enter; each pulse increments

U/D control in binary counter

Up/Down Control: 1 = counts up, 0 = counts down

MR input in binary counter

Master Reset - resets all outputs to 0 when signal is 1

LSB in 4-bit binary counter

Q0Q_0 (Least Significant Bit)

MSB in 4-bit binary counter

Q3Q_3 (Most Significant Bit)

Maximum count for n-bit counter

2n12^n - 1 then resets to zero

Modulo-N counter characteristic

Resets at any chosen number, not just powers of two

BCD counter reset point

After reaching 9 (decimal)

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